Fanless by Design: The Thermal Model for a Sealed 250W MPPT Enclosure

The last post covered why the sealing architecture comes first — the vent is the ingress point, so eliminating the vent is the decision that makes IP67 possible. This post covers what that decision costs in thermal terms, and whether the cost is payable.

The Thermal Budget

At 250W PV input and a target MPPT efficiency of 98%, the power stage dissipates approximately 5W under full load. That's across the MOSFET switching stage, the inductor, and the gate driver losses combined. At 20A charge current and 12V output, the I²R losses in the wiring and fusing are separate — the controller's internal thermal budget is the switching losses only.

5W in a sealed enclosure is not a trivial problem, but it is a solvable one. For comparison: a sealed automotive ECU in an engine bay dissipates 5–15W in an environment that regularly exceeds 80°C ambient. The marine dock environment — even in a New Zealand summer — peaks at 30–40°C ambient. The thermal headroom is larger.

Thermal Path in a Sealed Design

In a convectively cooled design, the thermal path is: junction → package → PCB copper → heatsink fin → air. The fin-to-air resistance is usually the dominant term.

In a sealed design, the path is: junction → package → thermal interface material (TIM) → enclosure wall → ambient air (natural convection on the outside surface). There is no fin — the enclosure wall is the heatsink surface.

This means three things:

1. Enclosure material must be aluminium. ABS plastic has a thermal conductivity of approximately 0.2 W/m·K. Aluminium is approximately 160 W/m·K. A sealed ABS enclosure at 5W dissipation would reach an internal equilibrium temperature high enough to damage the PCB. Aluminium extrusion or cast aluminium is not optional.

2. TIM selection is a design decision, not a default. The thermal interface material between the PCB and enclosure wall has to be selected deliberately. Target: Bergquist GP3000 or equivalent — 3 W/m·K, electrically isolating, compressible to accommodate interface flatness variation. White thermal paste is not appropriate here because it is not electrically isolating and not suitable for sustained use under mechanical interface pressure.

3. Thermal pad geometry is a layout constraint. The pad area under the MOSFET package has to be sized to match the TIM contact area. This is a PCB layout decision that has to be made before layout, not during. It affects copper pour placement, via placement, and the keepout zones on the bottom copper layer that interfaces with the TIM.

The Number to Hit

Target: junction temperature ≤ 125°C at 45°C ambient, 5W dissipation, sealed aluminium enclosure.

Thermal resistance estimates:

At 5W: ΔT ≈ 85°C above ambient. At 45°C ambient: junction temperature ≈ 130°C.

That is 5°C above the 125°C target. Marginal.

The Options

Three paths to bring the junction temperature within spec:

Option 1: External surface area. Ribs or fins on the outside of the enclosure reduce the enclosure-to-ambient resistance. A ribbed aluminium extrusion increases the external surface area without adding openings — compatible with IP67. A 50% increase in surface area (450cm² → 300cm²) would reduce Rθ enclosure-to-ambient from ~10°C/W to ~7°C/W, bringing total Rθ to ~14°C/W and junction temperature at 45°C ambient to ~115°C. Comfortable margin.

Option 2: Larger TIM contact area. Moving the MOSFET footprint to a larger thermal pad increases the contact area. Doubling the contact area from 1cm² to 2cm² roughly halves the TIM resistance to ~2.5°C/W, bringing total Rθ to ~14.5°C/W. Similar outcome to Option 1.

Option 3: Reduce ambient rating. At 40°C ambient (rather than 45°C), the 17°C/W model gives junction temperature ≈ 125°C exactly. Acceptable for NZ marine environments, where ambient temperatures above 40°C at the controller mounting position are uncommon. This is the conservative path — no additional geometry changes, rated to 40°C ambient rather than 45°C.

The likely implementation is a combination of Option 1 (ribbed enclosure) and Option 2 (larger thermal pad) to build real margin rather than just meeting spec at the edge.

What's Next

Power stage schematic in progress. MOSFET selection is working toward the D²PAK package, automotive grade, with a large exposed pad compatible with the thermal interface approach. The enclosure geometry decision will be finalised after the first thermal model pass — before any PCB layout work starts.

First prototype thermal validation will use a thermocouple on the MOSFET case and an IR camera on the enclosure exterior, running at full load for a 30-minute soak. That data will either confirm the model or show where it's wrong.

If you're working on a sealed power electronics enclosure and have opinions on TIM selection or natural convection surface geometry, comments are open — this design is in progress and engineering input is useful.

Build log for the MicroCore IP67 marine MPPT solar charger. MicroCore Systems — Auckland, NZ. Contact: jonathan@microcoresystems.co.nz